1. Field of the Invention
The present invention relates to a plasma display panel, and more particularly to a driver circuit for an AC-memory plasma display panel.
2. Description of the Related Art
Plasma display panels are advantageous in that they are simple in structure, can provide wide screen areas, and can use soda glass, which is widely used as window glass, as the material for substrates of plasma display panels.
Plasma display panels comprise two insulating substrates of soda glass, electrodes mounted on the insulating substrates, and partitions mounted on the insulating substrates for defining pixels as display units. The insulating substrates with the electrodes and the partitions disposed thereon are attached to each other, with a discharge gas sealed between the insulating substrates. The partitions are generally of a height of about 0.2 mm, and the insulating substrates each have a thickness of about 3 mm. Therefore, the plasma display panels are very thin and lightweight.
On account of these excellent features, plasma display panels are finding use on personal computers and office workstations, which have made much progress in recent years, and also will be used on large-screen wall-hanging television sets, which are expected to be become popular in the future.
The plasma displays are roughly classified into DC-type plasma displays and AC-type plasma displays. In the DC-type plasma displays, electrodes are held in direct contact with a discharge gas, and a direct current flows through the electrodes once a discharge occurs in the discharge gas. The AC-type plasma displays have an insulating layer interposed between electrodes and a discharge gas. After a voltage is applied, a current flows as a pulse for a short period of time such as about 1 microsecond and then converges. Since the insulating layer operates as a capacitor, when AC pulses are applied, pulsed emissions are repeatedly generated to display images.
While DC-type plasma displays are simpler in structure, electrodes are consumed quickly because they are exposed directly to discharges, making the DC-type plasma displays has a short service life. On the other hand, AC-type plasma displays have a longer service life because the electrodes are covered with the insulating layer though it entails an expenditure of labor and cost to form the insulating layer. Recent years have seen efforts to develop AC-type plasma displays for the reason that it is now possible to easily realize a function called a memory to achieve high-luminance light emissions.
The structure of an AC-memory plasma display panel and a method of driving the AC-memory plasma display panel, and a conventional driver circuit will be described below.
FIGS. 1A and 1B of the accompanying drawings show a general AC-memory plasma display panel disclosed in Japanese laid-open patent publication No. 295506/95. The disclosed AC-memory plasma display panel can be energized by a driver circuit according to the present invention and a conventional driver circuit. As shown in FIGS. 1A and 1B, the general AC-memory plasma display panel comprises a first insulating substrate 11 of soda glass having a thickness of 3 mm, a second insulating substrate 12 of soda glass having a thickness of 3 mm, striped sustaining electrodes 13a of transparent nesa film, striped scanning electrodes 13b of transparent nesa film, metal electrodes 13c of thick silver film for supplying sufficient currents to the transparent sustaining electrodes 13a and the scanning electrodes 13b, striped column electrodes 14 of thick silver film, a discharge gas space 15 filled with a discharge gas of He and Ne composed at a ratio of 7:3, respectively, with 3% of Xe mixed under a total pressure of 500 Torr, partitions 16 of thick film which sustains the discharge gas space 15 and defining pixels, a fluorescent layer 17 of Zn.sub.2 SiO.sub.4 : Mn for converting ultraviolet radiation generated by a discharge in the discharge gas into visible light, an insulating layer 18a of transparent thick-film glaze covering the sustaining electrodes 13a, the scanning electrodes 13b, and the metal electrodes 13c, an insulating layer 18b of thick film covering the column electrodes 14, and a protective layer 19 of MgO having a thickness of 2 um for protecting the insulating layer 18b from discharges.
In FIG. 1A, regions surrounded by the partitions 16 which extend vertically and horizontally serve as pixels 20. A pixel at the point of intersection between a scanning electrode Si (i=1, 2, . . . , m) and a column electrode Dj (j=1, 2, . . . , n) is represented by a.sub.ij. With the fluorescent layer 17 being coated with colors of red, green, and blue in alignment with the respective pixels, the AC-memory plasma display panel serves as a plasma display panel capable of displaying images in full colors.
The AC-memory plasma display panel may display images on an upper surface or a lower surface thereof as viewed in FIG. 1B. In the structure shown in FIGS. 1A and 1B, the lower surface of the AC-memory plasma display panel has a greater aperture ratio, and should preferably be used as a display surface because it allows a viewer to directly see light-emitting regions of the fluorescent layer 17 and provide a higher level of luminance.
FIG. 2 of the accompanying drawings shows in plan a plasma display panel with electrodes being illustrated with greater emphasis. The plasma display panel, denoted at 10, has a first insulating substrate 11 and a second insulating substrate 12 which are attached to each other and hermetically sealed by a seal 21 with a discharge gas filled between the first and second insulating substrates 11, 12. The plasma display panel 10 also has an array 13a of sustaining electrodes C1, C2, . . . , Cm, an array 13b of scanning electrodes S1, S2, . . . , Sm, and an array 14 of column electrodes D1, D2, . . . , Dn-1, Dn.
In an actual plasma display panel design, there are 480 scanning electrodes S.sub.1, S.sub.2, . . . , Sm, 480 sustaining electrodes C.sub.1, C.sub.2, . . . , C.sub.m, and 1920 column electrodes D.sub.1, D.sub.2, . . . , D.sub.n-1, D.sub.n. Pixels are spaced at a pitch of 0.35 mm between the column electrodes and a pitch of 1.05 mm between the scanning electrodes. The distance between adjacent scanning and column electrodes is 0.2 mm.
A process of displaying gradations on the plasma display panel will be described below. Unlike other display desices, since it is difficult for the plasma display panel to display highly luminous gradations by varying applied voltages, it is customary for the plasma display panel to display highly luminous gradations by controlling the number of times that it produces light emissions. For displaying highly luminous gradations, the plasma display panel is controlled by a subfield process described below.
FIG. 3 of the accompanying drawings illustrates a graph having a horizontal axis which represents time and a vertical axis which represents scanning electrodes. One image is transmitted in one field by a computer or a broadcasting system. While the time of a field differs depending on the computer or the broadcasting system, it is usually set to a range from about 1/50 to 1/75 second.
For a plasma display panel to display gradations, one field is divided into k subfields (k=6 subfields SF1.about.SF6 in FIG. 3). Each of the subfields has a sustaining discharge period for display light emissions and a writing discharge control period which includes periods for preliminary discharge other than sustaining discharge, preliminary discharge extinguishment, and scanning.
The number of light emissions caused by sustaining discharges for each pixel in the subfields SF1.about.SF6 is weighted by 2.sup.n, and the luminance of a displayed image is controlled as follows: ##EQU1## where n is the number of a subfield, with the subfield of lowest luminance being numbered "1" and the subfield of highest luminance being numbered "k", L.sub.1 is the luminance of the subfield of lowest luminance, and a.sub.n is a variable which takes a value of 1 or 0, a.sub.n =1 if light is to be emitted from the pixel in the nth subfield and a.sub.n =0 if light is not to be emitted from the pixel in the nth subfield. Since the subfields have different levels of luminance of emitted light, the luminance can be controlled by selecting energization or de-energization of each of the subfields.
In FIG. 3, k=6, and if color pixels of red, green, and blue are combined into one pixel set for displaying color images, then it is possible to express 2.sup.k =2.sup.6 =64 gradations for each of the colors, and to display 64.sup.3 =262144 colors (including black). If k=1, then one field is equal to one subfield, and it is possible to express 2 gradations (on or off) for each of the colors, and to display 2.sup.3 =8 colors (including black).
FIG. 4 of the accompanying drawings shows the waveforms of drive voltages and emitted light in one subfield of the plasma display panel shown in FIGS. 1A, 1B and 2.
In FIG. 4, a waveform A represents a voltage applied to the sustaining electrodes C.sub.1, C.sub.2, . . . , Cm, a waveform B a voltage applied to the scanning electrode S.sub.1, a waveform C a voltage applied to the scanning electrode S.sub.2, a waveform D a voltage applied to the scanning electrode S.sub.m, a waveform E a voltage applied to the column electrode D.sub.1, a waveform F a voltage applied to the column electrode D.sub.2, and a waveform G light emitted from a pixel a.sub.11. Pulses with diagonal lines of the waveforms E, F indicate that their presence or absence is determined by the presence or absence of data to be written. In FIG. 4, data voltage waveforms show that data are written in pixels a.sub.11, a.sub.22, and pixels of the third and following rows display images depending on the presence or absence of data.
Sustaining pulses 31 and a preliminary discharge pulse 36 are applied to the sustaining electrodes C.sub.1, C.sub.2, . . . , C.sub.m. Sustaining pulses 32, extinguishing pulses 35, and preliminary discharge extinguishing pulses 37, which are common to the scanning electrodes S.sub.1, S.sub.2, . . . , Sm, and scanning pulses 33 at times independent of the scanning electrodes S.sub.1, S.sub.2, . . . , S.sub.m, are applied linearly sequentially to the scanning electrodes S.sub.1, S.sub.2, . . . , S.sub.m. If there is light emission data, then data pulses are applied to the column electrodes D.sub.j (j=1, 2, . . . , n) in synchronism with the scanning pulses 33.
The plasma display panel shown in FIGS. 1A, 1B, and 2 operates as follows: Those pixels which have emitted light in the preceding subfield are extinguished by the extinguishing pulses 35. Then, all the pixels are forcibly discharged once by the preliminary discharge pulse 36, and the preliminary discharge is extinguished by the preliminary discharge extinguishing pulses 37, allowing writing discharges to occur easily with next scanning pulses 33.
After the preliminary discharge is extinguished, the scanning pulses 33 and the data pulses 34 are synchronously applied between the scanning electrodes and the column electrodes for causing writing discharges. Subsequently, sustaining discharges are sustained between adjacent sustaining and scanning electrodes by the sustaining pulses 31, 32. When only the scanning pulses 33 or the data pulses 34 are applied, no writing discharges occur, and no subsequent sustaining discharges occur. Such a function is referred to as a memory function. The luminance of light emitted in each of the subfields is controlled by the number of sustaining discharges.
FIG. 5 of the accompanying drawings shows a different process of driving a plasma display panel as disclosed in Japanese laid-open patent publication No. 42289/92. In FIG. 5, T.sub.1 .about.T.sub.6 represent subfields. According to the process shown in FIG. 5, the timing of writing discharges and the timing of sustaining discharges are scanned, and one preliminary discharge occurs per field. FIG. 6 of the accompanying drawings shows the waveforms of drive voltages applied in one subfield shown in FIG. 5. As shown in FIG. 6, sustaining pulses are successively applied unlike the waveforms shown in FIG. 4. Three scanning pulses are applied in one sustaining pulse period, and data pulses are applied synchronously with the scanning pulses in a manner not to overlap the sustaining pulses and extinguishing pulses. In association with scanning pulses, extinguishing pulses are applied simultaneously to three scanning electrodes, and are scanned as one set.
Finally, a circuit for generating these waveforms of drive voltages will be described below. As can be seen from FIG. 4, the sustaining pulses 31, 32 are applied commonly to the sustaining electrodes C.sub.1, C.sub.2, . . . , C.sub.m and the scanning electrodes S.sub.1, S.sub.2, . . . , S.sub.m. Therefore, a circuit for generating sustaining pulses may be shared throughout the entire screen of the plasma display panel. For example, as shown in FIG. 3 of an article "Large-screen AC color plasma display--View in present and future--", written by Akira Ohtsuka (a magazine "Display and Imaging (Japanese version)", 1996, Vol. 4, pages 67.about.73, published by Science Communications International Co., Ltd.), a circuit for generating sustaining pulses 31 for sustaining electrodes is marked with "X SUSTAIN PULSER", and generated sustaining pulses are applied altogether to the entire screen. In addition, a circuit for generating sustaining pulses 32 for scanning electrodes is marked with "Y SUSTAIN PULSER", and generated sustaining pulses are also applied altogether to the entire screen.
It is known that in order to cause writing discharges reliably, the time after preliminary discharge extinguishing pulses 37 are applied until scanning pulses 33 are applied should be as short as possible. It is also known that in order to cause sustaining discharges reliably after writing discharges, the time from the writing discharges until sustaining discharges should be as short as possible. See Japanese laid-open patent publication No. 191627/95 for details.
FIG. 7 of the accompanying drawings shows a driving process of a first technical example shown in FIG. 1 of Japanese laid-open patent publication No. 191627/95, the view illustrating a driven state of one subfield. In FIG. 7, A1 represents a period for applying preliminary discharge pulses, B1 a period for applying preliminary discharge extinguishing pulses, C.sub.11, C.sub.12, C.sub.13 writing discharge periods, E.sub.11, E.sub.12, E.sub.13 first sustaining discharge periods, and D.sub.1 a second sustaining discharge period.
Scanning electrodes S.sub.1, S.sub.2, . . . , S.sub.m are divided into three scanning electrode blocks G, H, I. Although not shown, sustaining electrodes C.sub.1 .about.C.sub.m paired with the scanning electrodes S.sub.1 .about.S.sub.m are also grouped into three sustaining electrode blocks corresponding to the scanning electrode blocks G, H, I.
In FIG. 7, in order to reduce the period from writing discharges until sustaining discharges, independent sustaining discharge periods E11, E12, E13 are provided for the respective scanning electrode blocks or the respective sustaining electrode blocks immediately after writing processes in the respective scanning electrode blocks are finished.
FIG. 8 of the accompanying drawings shows the waveforms of drive voltages (FIG. 3 of Japanese laid-open patent publication No. 191627/95) according to the driving process shown in FIG. 7. In FIG. 8, A7 represents a period for applying preliminary discharge pulses, B7 a period for applying preliminary discharge extinguishing pulses, C71, C72, C73 writing discharge periods, E71, E72, E73 first sustaining discharge periods, and D7 a second sustaining discharge period.
In FIG. 8, COM1, COM2, COM3 represent the waveforms of sustaining electrode drive voltages applied to the respective sustaining electrode blocks, S11, S12 the waveforms of drive voltages applied to first and second scanning electrodes of the scanning electrode block G, S21, 522 the waveforms of drive voltages applied to first and second scanning electrodes of the scanning electrode block H, S31, S32 the waveforms of drive voltages applied to first and second scanning electrodes of the scanning electrode block I, and DATA the waveform of a drive voltage applied to a data electrode.
As can be understood from FIG. 8, since the first sustaining discharge periods E71, E72, E73 are independent with respect to the scanning electrode blocks and the sustaining electrode blocks, sustaining pulses 41 contained in the waveforms COM1, COM2, COM3 of sustaining electrode drive voltages are independent with respect to the sustaining electrode blocks. Similarly, sustaining pulses 42 contained in the wave-forms S11, S12, S21, S22, S31, S32 of scanning electrode drive voltages of the scanning electrode blocks are independent with respect to the scanning electrode blocks.
For causing writing discharges reliably and making a reliable shift from writing discharges to sustaining discharges, the driving process which employs the scanning electrode blocks and the sustaining electrode blocks may be employed as described above. Since sustaining pulses used in the scanning electrode blocks and the sustaining electrode blocks need to be independently controlled, circuits for generating sustaining pulses for the sustaining electrodes of the sustaining electrode blocks and the scanning electrodes of the scanning electrode blocks are provided independently in association with the sustaining electrode blocks and the scanning electrode blocks, respectively. A circuit arrangement including those circuits is illustrated in FIG. 9 of the accompanying drawings.
The circuit arrangement shown in FIG. 9 includes scanning pulse generators 2 for generating scanning pulses 33, data pulse generators 4 for generating data pulses, sustaining-electrode common pulse generators 39 for generating preliminary discharge extinguishing pulses 37 and sustaining pulses 41 and sustaining pulses 31 independent with respect to the sustaining electrode blocks, and scanning-electrode common pulse generators 40 for generating preliminary discharge pulses 36 and sustaining pulses 42 and sustaining pulses 32 independent with respect to the scanning electrode blocks. Sustaining electrodes 13a are divided into three sustaining electrode blocks CC11.about.CC1m, CC21.about.CC2m, CC31.about.CC3m corresponding to the scanning electrode blocks, and are connected commonly to electrodes CA, CB, CC for the respective sustaining electrode blocks.
As revealed in Japanese laid-open patent publication No. 191627/95, the driving process which employs the scanning electrode blocks and the sustaining electrode blocks may be employed for causing writing discharges reliably and making a reliable shift from writing discharges to sustaining discharges to eliminate writing errors.
As sustaining pulses used in the scanning electrode blocks and the sustaining electrode blocks need to be independently controlled, circuits for generating sustaining pulses for the sustaining electrodes of the sustaining electrode blocks and the scanning electrodes of the scanning electrode blocks are provided independently in association with the sustaining electrode blocks and the scanning electrode blocks, respectively.
To actually carry out the driving process which employs the scanning electrode blocks and the sustaining electrode blocks, the plasma display panel is energized with the independent circuits for generating sustaining pulses for the sustaining electrodes of the sustaining electrode blocks and the scanning electrodes of the scanning electrode blocks. Because the sustaining pulse generating circuits are provided independently in association with the sustaining electrode blocks and the scanning electrode blocks, respectively, if the numbers of pixels that emit light in the sustaining electrode blocks and the scanning electrode blocks differ from each other, then the sustaining electrode blocks and the scanning electrode blocks emit light with different luminances. Reasons why such luminance differences are produced by the sustaining electrode blocks or the scanning electrode blocks will be described below.
FIG. 10 of the accompanying drawings shows a basic sustaining pulse generating circuit for use as the sustaining-electrode common pulse generators 39 or the scanning-electrode common pulse generators 40 in the circuit arrangement illustrated in FIG. 9. As shown in FIG. 10, the basic sustaining pulse generating circuit comprises a P-channel FET 51 serving as a pull-up switch, an N-channel FET 52 serving as a pull-down switch, an electrolytic capacitor 53, and a small-capacitance capacitor 54 which comprises a ceramic capacitor or a film capacitor. The basic sustaining pulse generating circuit also has voltage measuring points PP1, PP2 and a power supply terminal--VS for applying a sustaining voltage--VS.
In FIG. 10, the electrolytic capacitor 53 has a static capacitance of 10 uF or higher. Since the plasma display panel has a static capacitance of about 10 nF, the static capacitance of the electrolytic capacitor 53 is at least 1000 times the static capacitance of the plasma display panel. High-frequency components having frequencies of at least 100 KHz bypass the electrolytic capacitor 53 through the small-capacitance capacitor 54. Therefore, when light-emitting currents are supplied to the plasma display panel, any potential fluctuations at the voltage measuring point PP1 are small.
The N-channel FET 52 has an on-state resistance of about 0.5 .OMEGA. with respect to a peak current of about 20 A, thus producing a voltage drop of about 10 V. If economy were ignored, then it would be possible to use a switching device such as an FET having a larger current capacity and a smaller on-state current. However, in view of cost and size considerations, it is necessary to use FETs of such an on-state resistance.
As described above, a voltage drop in circuits for generating sustaining pulses when discharge light emissions are produced is mainly developed by switches such as FETS.
FIG. 11A of the accompanying drawings shows the waveforms of voltages in the sustaining pulse generating circuit shown in FIG. 10 for the scanning electrode blocks and the sustaining electrode blocks where the number of light-emitting pixels is small, and FIG. 11B of the accompanying drawings shows the waveforms of voltages in the sustaining pulse generating circuit shown in FIG. 10 for the scanning electrode blocks and the sustaining electrode blocks where the number of light-emitting pixels is large. In FIGS. 11A and 11B, the reference numeral "60" represents a sustaining pulse and the reference numerals "61".about."64", voltage reductions at the time of a discharge light emission.
When the number of light-emitting pixels is small, as shown in FIG. 11A, the voltage drop across the N-channel FET 52 is small, and the voltage reduction 62 caused at the voltage measuring point PP2 by a voltage drop due to a discharge light emission is also small. However, when the number of light-emitting pixels is large, as shown in FIG. 11B, while any potential fluctuations at the voltage measuring point PP1 are small, the voltage drop across the N-channel FET 52 is large, and the voltage reduction 62 caused at the voltage measuring point PP2 by a voltage drop due to a discharge light emission is of a large value of at least 10 V.
Therefore, the luminance of light emissions from the scanning electrode blocks and the sustaining electrode blocks where the number of light-emitting pixels is small is high because the voltage reduction 62 is small and a sufficient voltage is applied to the light-emitting pixels, whereas the luminance of light emissions from the scanning electrode blocks and the sustaining electrode blocks where the number of light-emitting pixels is large is low because the voltage reduction 64 is large and a sufficient voltage is not applied to the light-emitting pixels.
Such a phenomenon may be minimized by reducing the internal resistance of the circuits for generating sustaining pulses to a sufficiently low level. Specifically, the internal resistance of switching elements such as power FETs that develop a large voltage drop in the circuits for generating sustaining pulses may be reduced to a sufficiently low level. If the internal resistance of such switching elements is reduced to a sufficiently low level, however, the switching elements have to be greatly increased in size. As a result, not only the sustaining pulse generating circuits are greatly increased in size, but also the switching elements and driver circuits for driving the switching elements are also greatly increased in cost to the point where these switching elements and circuits are not practically affordable.
According to the conventional technical achievements limited by physical sizes and economical limitations, therefore, the scanning electrode blocks and the sustaining electrode blocks which have different numbers of light-emitting pixels have suffered different levels of luminance.
If the scanning electrode blocks and the sustaining electrode blocks have different levels of luminance, then luminance differences can clearly be perceived between the scanning electrode blocks or the sustaining electrode blocks. Such luminance differences can immediately be recognized by not only persons who are deeply involved in image display fields but also general people who watch display devices. The luminance differences between the scanning electrode blocks or the sustaining electrode blocks are not contained in original images to be displayed, and hence make displayed images false. The luminance differences are conspicuous particularly in the display of scenic images, and tend to completely impair the displayed quality of scenic images. Such a shortcoming is fatal for display units, and so crucial that it will spoil the commercial value of display units.